The minimum size of pattern features (i.e., "critical dimension") of integrated circuits continues to decrease over the years. This trend is largely driven by the demand for increasing density of dynamic random access memory (DRAM). Other high performance semiconductor applications such as communications, analog and military needs also require increasingly smaller critical dimension features. The typical integrated circuit mask consists of as many as 25 independent masks, perhaps generated by different exposure tools. The relative placement of features for various mask levels must be accurate to within a small fraction of the critical dimension. Thus, the ability to measure and verify pattern placement accuracies is an essential part of lithography process control. At the present state of the art, commercially available metrology tools are capable of 50 nanometers accuracy.
A metrology tool adapted for use with semiconductor apparatus ideally should accommodate a variety of substrates, including x-ray masks, phase shifting reticles, 1:1 optical reticles, semiconductor wafers and electron beam scatter masks. Each of the substrate types has its own unique attributes, requiring versatility in the metrology tool. It is vital that the metrology tool have the ability to measure actual pattern features in a product, as opposed to measuring test targets distributed around the periphery of a product's active areas. The metrology tool must therefore, have a resolution that enables discrimination amongst features that exhibit a scale comparable with the critical dimension.
Existing tooling for X, Y coordinate metrology employ light beams that are focussed to a spot at the surface of the workpiece to be measured. Pattern edge positions are measured by detecting relative motion of the spot and the substrate. The edges of pattern features are used as the basis for further computations of feature centerline positions. The optical spot size is in the range of 0.5-2.0 microns. This exceeds the critical dimension on many substrates and necessitate that the substrate include a special measurement target (or targets). Because of the size of such targets, they cannot be located within the active circuit area where measurements are relevant.
The measurement time of prior art instruments is in the range of 4 seconds per axis, per feature. This is equivalent to 450 features measured per hour and is an extremely small fraction of the number of features on a typical mask. As a result, acceptance decisions are based on inadequate sample sizes.
Electron beam metrology tools have been used in the prior art for the measurement of semiconductor features. In U.S. Pat. Nos. 4,751,384 and 4,767,926, electron beam metrology systems are described by Murakoshi et al. wherein the surface of a sample is scanned by an electron beam and secondary electrons emitted from the surface are detected. The width of a pattern on the semiconductor surface is measured by using the detected signal, with detectors being disposed symmetrically with respect to the optical axis of the beam. A ratio of one of the output signals of the detectors to the other output signal is used to enable the measurement to be achieved. Although useful for measurement of feature sizes, the Murakoshi et al. system inherently lacks the stability required for accurate pattern placement measurement over 200 mm distances.
Chang et al. in "Advanced Nanometrology Tool for X-Ray Electron Beam Masks" IBM Technical Disclosure Bulletin, Vol. 33, No. 8, January 1991, pages 149-151 describe a metrology tool which employs a scanning, tunneling, microscope field emission tip to interrogate the surface of a workpiece. Relative motion between the workpiece and the scanning tunneling microscope tip enables surface features of the workpiece to be measured. However, modern masks and semiconductor wafers exhibit a large surface area, with some approximating 8 inches across their largest dimension. An ability to accurately provide relative movement between an STM tip and such a large semiconductor surface, across the entire surface of the wafer-mask structure, is both time consuming, difficult and expensive to achieve.
Accordingly, it is an object of this invention to provide an improved electron-beam nano-metrology tool which enables highly accurate and stable measurements, where the critical dimension of a substrate is in the range of 0.1-0.5 microns.
It is another object of this invention to provide an improved nano-metrology tool which is highly temperature stable and requires minimal thermal controls.
It is yet another object of this invention to provide an improved nano-metrology tool wherein errors due to beam interrogation directions are avoided.
It is yet another object of this invention to provide an improved nano-metrology tool wherein both conductive and non-conductive substrates can be subjected to a measuring electron beam.